Rigetti Computing, Inc. Q3 FY2024 Earnings Call

Good day. Thank you for standing by. Welcome to Rigetti’s Third Quarter 2024 Earnings Conference Call. At this time, all participants are in a listen-only mode. After the speakers' presentation, there will be a question and answer session. Please note that today's conference is being recorded. I will now hand the conference over to your speaker, Dr. Subodh Kulkarni, President and CEO. Please go ahead, sir.

Good morning, and thank you for participating in Rigetti's earnings conference call covering the third quarter ended September 30, 2024. Joining me today is Jeff Bertelsen, our CFO, who will review our results in some detail following my overview. We will be pleased to answer your questions at the conclusion of our remarks. We would like to point out that this call and Rigetti's third quarter ended September 30, 2024, press release contain forward-looking statements regarding current expectations, objectives, and underlying assumptions regarding our outlook and future operating results. These forward-looking statements are subject to a number of risks and uncertainties that could cause actual results to differ materially from those described and are discussed in more detail in our Form 10-K for the year ended December 31, 2023, our Form 10-Q for the three and nine months ended September 30, 2024, and other documents filed by the company from time to time with the Securities and Exchange Commission. These filings identify and address important risks and uncertainties that could cause actual events and results to differ materially from those contained in the forward-looking statements. We urge you to review these discussions of risk factors. Today, I'm pleased to provide an update and report on our progress at Rigetti Computing. I'm excited to announce that we plan to introduce a new modular system architecture at Rigetti. By mid-year 2025, we expect to release a 36-qubit system based on 49-qubit chips tied together with a targeted 99.5% median 2-qubit gate fidelity. By the end of 2025, we expect to release a system with over 100 qubits with a targeted 99.5% median 2-qubit gate fidelity. We plan to develop the 336-qubit LiRAR system thereafter. Rigetti remains on track to develop and deploy its anticipated 84-qubit Ankaa 3 system with the goal of achieving a 99% plus median 2-qubit gate fidelity by the end of 2024. We believe superconducting qubits have many advantages over other qubit modalities, including that they are fabricated using well-established semiconductor design and manufacturing techniques. Superconducting qubits also perform faster gate operations than other qubit modalities. Our system gate speeds consistently achieve an active duration of 60 to 80 nanoseconds, which is four orders of magnitude faster than other modalities such as ion traps and pure atoms. System speed is an important factor to enable hybrid computing with current CPUs and GPUs. After spending years optimizing the performance of our larger scale 84-qubit Ankaa chips and honing our multi-chip scaling technology, we are manufacturing 9-qubit chips at 99.4% median 2-qubit gate fidelity, and in Q3 of this year, we demonstrated timing of 9-qubit chips without deterioration in performance. We believe the anticipated 4-chip 36-qubit system will be the most ambitious multichip QPUs architecture in the market and a significant milestone for the company and the quantum computing industry. Our approach to scalability mirroring multi-chip architectures for advanced applications with CMOS is supported by our recently announced alternating bias-assisted annealing or ABAA technique for precisely targeted cubic frequencies. ABAA allows us to consistently manufacture high-performance QPUs with the frequency precision necessary for high fidelities. The combination of our ABAA technique and a multichip architecture is the cornerstone of our scaling strategy as we move into developing higher-qubit count systems. In addition, quantum error correction will be essential to achieve the accuracy needed for quantum computers to realize their full potential. Together with Riverlane, we are working to advance our understanding of how to build fault-tolerant quantum computers using quantum error correction technology. Recently, we published a paper with Riverlane that demonstrates how integrating Riverlane's quantum error decoder into the control system of our 84-qubit Ankaa 2 system enables the achievement of real-time low latency quantum error correction, a critical process for developing fault-tolerant quantum computers. We believe that our 9-qubit Nuvera QPU is ideal for experimentation across a variety of research areas, including qubit characterization and hybrid quantum algorithms. We are excited to share that Innovaira QPU has been co-located at the Israeli Quantum Computing Center, IQCC, with Quantum Machines OPX1000 control system and NVIDIA's Grace Hopper Superchip Servers, which was made available to partners for research and experimentation. The setup was recently leveraged for a reinforcement learning project which was presented at IEEE Quantum Week 2024 in September. The demonstration entailed optimizing single-qubit operations on the Nuvera QPU and is an exciting use case for using a Nuvera QPU for quantum machine learning development. Finally, the UK's National Quantum Computing Centre, or NQCC, officially opened the doors of its landmark facility on Harwell Campus on October 25, 2024. The facility will support world-class quantum computing research and provide state-of-the-art laboratories for designing, building, and testing quantum computers. The state-of-the-art facility includes our fully operational 24-qubit Ankaa class system that will be made available to NQCC researchers for testing, benchmarking, and exploratory applications development. In summary, I'm excited about our 2025 roadmap and progress on the technology front. We believe the combination of our ABAA technique and a multi-chip architecture will serve as the cornerstone of our scaling strategy as we move into developing higher-qubit count systems with improved fidelities. Thank you. Jeff will now make a few remarks regarding our recent financial performance.

Thanks, Subodh. Revenues in the third quarter of 2024 were $2.4 million compared to $3.1 million in the third quarter of 2023. Revenue is an important part of our strategy to fund our ongoing research initiatives. We have added to our sales and marketing staff and have expanded our lobbying efforts to help grow our revenue in the future. Gross margins in the third quarter of 2024 came in at 51% compared to 73% in the third quarter of 2023. Revenue and gross margin variability is to be expected at this stage of the company's evolution, given the variable nature of our contract deliverables and timing with major government agencies. In addition, our recent contract to deliver a 24-qubit Quantum system has a lower gross margin profile than most of our other revenue. On the expense side, total OpEx in the third quarter of 2024 was $18.6 million compared to $19.1 million in the same period of the prior year. The year-over-year decrease in total OpEx was primarily driven by $1.1 million of expense recognized in the third quarter of 2023 for the Ampere Ford agreement, which expired in October 2023. Stock compensation expense for the third quarter of 2024 was $3.4 million compared to $3.7 million for the third quarter of 2023. Net loss for the third quarter of 2024 was $14.8 million or $0.08 per share compared to a net loss of $22.2 million or $0.17 per share for the third quarter of 2023. The non-cash change in the fair value of derivative warrant and earn-out liabilities favorably impacted our net loss for the third quarter of 2024 by $2 million compared to a negative impact of $5.2 million in the comparable prior year period. Cash, cash equivalents, and available-for-sale investments totaled $92.6 million as of September 30, 2024. During the third quarter of 2024, we raised $12 million from the sale of 11.3 million common shares under our current ATM program. As of September 30, 2024, up to 60.2 million of common stock remains available for sale under our current ATM program. As disclosed in today's 10-Q filing, we believe that our existing balances of cash, cash equivalents, and marketable securities should be sufficient to meet our anticipated operating cash needs until midway through the first quarter of 2026 based on our current business plan and expectations and assumptions considering current macroeconomic conditions. Thank you. We would now be happy to answer your questions.

Thank you. And our first question coming from the line of David Williams with The Benchmark Company. Your line is now open.

Hey, good morning, and thanks for taking my question. First, I guess congratulations to you and the team on all the continued progress. And Subodh, it sounds like you have increased confidence here in the roadmap and just the ability to achieve the targeted fidelities while continuing to drive the qubit scale count. But I guess I'm curious, has anything changed in the way that you're thinking about the roadmap and maybe the strategy? And it feels like just maybe some of the progress especially on the tiling is moving at a really nice clip here. So just anything that you think is outpacing the cadence that you thought you anticipated maybe earlier?

Yes, thanks, David. Yes, indeed as you correctly said, our confidence in our roadmap is increasing as we disclosed. We are making very high-quality 9-qubit chips with median 1-qubit gate fidelity of 99.9% and 2-qubit gate fidelity of 99.4%. We have high confidence we will drive those numbers up going forward and we have demonstrated now that we can tile 9-qubit chips without any deterioration in performance, and that continues to be at extremely high gate speeds as you saw, 60 to 80 nanoseconds. So we have pretty high confidence that we can start tiling 9-qubits, and that's why we said we will tile four 9-qubit chips to get us 36-qubit with incredible gate speeds and further it is in the mid 99s, by the middle to end of next year, and will continue thereafter to deliver the 100-qubit along with the 9-qubit timings plan and then eventually the 336-qubit. So overall our confidence is pretty good that we will be able to execute this roadmap. Our confidence in superconducting continues to be very high, particularly because of the high gate speeds. We still think superconducting is the only way to really have hybrid computing that can coexist with CPUs and GPUs compared to other modalities where the speeds become a real detriment. So we feel pretty good about our roadmap and execution along that line.

Fantastic. Great to hear. I guess on the other side, you had mentioned again the tiling of the 9-qubit chips and no performance deterioration. But were there any other metrics that were perhaps better than expected or other areas where you can see further improvement is needed perhaps?

Well, certainly, we are learning tiling chips. We have just we did our first tiling work a couple of years ago with 40-qubit chips. But at that time, the fidelities were indeed much lower. Now we are dealing with mid-99s for fidelity with the 9-qubit chips. So it was important we demonstrated again that we can tile chips at this high fidelity level without losing any fidelity. What is fascinating to me is that you can tile chips across and have signals communicate across interpositions and still maintain entanglement and all the critical metrics that we care about: fidelity, gate speeds, and other secondary metrics as well. So overall, it indeed does work and we feel pretty good that’s the right way to go about scaling. The beauty of tiling chips is fundamentally we are taking advantage of the chiplet technology that has been pioneered by the CMOS industry. So we definitely get a huge leverage from the CMOS industry and all the work that they have done in tiling CMOS chips. Certainly, it puts some higher pressure on packaging and testing, and measurement, but that work has already been done by the CMOS industry, so we can leverage that work very nicely. So we feel very good about tiling chips.

Great. And maybe just one more if you don't mind, but just wanted to ask some of the government funding opportunities. I thought it was interesting you had talked about maybe spending a little more money there on lobbying efforts as we know one of your peers has done. But how do you think about maybe the areas of opportunity for funding? Is there anything out there that you see today that you've got a good shot at or anything maybe just any updates around the government funding? Thank you.

Sure. So certainly, we look at the U.S. Government as the main place to fund our work. NQI, the original NQI Act signed in 2018 has expired. NQI reauthorization hasn't been signed yet, and that certainly has impacted our near-term financials, including Q3 and for the next quarter or two until the NQI reauthorization is signed. But we are pretty confident there is bipartisan support for the NQI authorization to get signed and it will be signed as soon as a new administration is in place. Regarding other, DoD has some special projects as a DARPA project, fairly sizable, almost $300 million over seven years that we are trying to get part of that award. And there are other opportunities too, but you are right. There are multiple opportunities between DOE and DoD and we are spending more time and effort including some lobbying effort to try to get some of that money.

Thank you. And our next question coming from the line of Quinn Bolton with Needham and Company. Your line is now open.

Hey, Subodh and Jeff, I wanted to follow up on David's question regarding the shift in roadmap to focus more on tiling in the near term rather than advancing to larger single chip-qubit processors. Based on your work, how do you see the balance between single chip processors and the number of tiles you might incorporate in a system? As you plan for 100 qubit to over 1,000 qubit systems, do you think larger tiles will play a significant role, or do you believe you can efficiently tile 16 or 25 of these lower-qubit processors to maintain gate speed and fidelity as you increase qbit count?

That's a great question. We're not entirely certain about the ideal number of qubits for tiling. Currently, we're using a 9-qubit chip because it offers high fidelity. We plan to investigate other qubit counts over time, but for now, tiling 9-qubit chips is proving effective. Our 9-qubit chip measures 6 millimeters by 6 millimeters, allowing us to achieve tens of thousands, even hundreds of thousands of qubits in a practical space of around 15 centimeters by 15 centimeters, which is manageable in a dilution refrigerator. We're confident that tiling 9-qubit chips can lead us to substantial advancements. If we enhance the area density by four times, which is quite feasible, we can fit in many more qubits. This is why we began with 9-qubit tiling; if we discover a more optimal qubit count in the future, we will certainly consider that. As previously mentioned, we achieve a higher qubit count by tiling the chips without any negative impact on key metrics or fidelity. There's no reason not to tile this way; it's the most scalable approach. We're also working to increase the qubit count on larger chips, as are some competitors. However, building larger chips while maintaining quality is challenging. The CMOS industry has standardized on smaller chip technology because it allows for the production of thousands of small qubit chips with high yields, enabling the selection of the best chips for tiling. This process is standard practice in the CMOS industry. The 3-nanometer and 5-nanometer CMOS nodes, although more complex to manufacture, choose smaller tile sizes for the same reasons we opt for 9-qubit designs. We're leveraging lessons learned from the CMOS industry and plan to utilize those insights moving forward. I hope that answers your question.

Yeah, no, I appreciate the color. It sounds like tiling has certainly increased in terms of its importance in your roadmap looking forward. So I appreciate those comments. I guess, the second question is, you've had your sights set on a 99.5% qubit fidelity now for some time. How much higher above 99.5 do you think you need to get qubit fidelity or when perhaps more importantly do you start to pivot to quantum error correction? You had the announcement with Riverlane on primary correction this quarter. And so once you get 99.5%, do you start to pivot especially as the qubit counts go up on your multi-tile approach? Do you start to then focus more attention on quantum error correction or when do you think quantum error correction starts to play a bigger role in your roadmap?

We are already seeing progress with our collaboration with Riverlane. Our 9-qubit system currently achieves 99.4% fidelity, which is a solid starting point for implementing error correction. We've shown promising proof of concept for real-time error correction at the operational gates. We will continue to enhance fidelity, as there is always room for improvement. The CMOS industry currently operates at fidelity levels ranging from 49 to 69 and even higher, continuously striving for improvement. Similarly, we aim to follow this trajectory in the semiconductor field. Presently, we are at effectively 2 nines and approaching 3 nines in superconducting qubits. Once we reach 3 nines in the next three to five years, we will target 4 nines and beyond. To address your question, error correction becomes practical at about mid-2 nines, around 99.5%, which allows for tangible value to be derived from the system. We believe achieving a narrow quantum advantage—evidenced by superior performance or cost in practical applications—is feasible within the next year or two with a few hundred qubits at mid-99s fidelity and error correction. In summary, error correction is already beginning to have an impact at the mid-99s level, and as we enhance fidelity, its significance will only grow. It's already relevant now.

Got it. And then a quick one for Jeff. You'd mentioned the NQCC contract being a lower margin contract for you. Now that the 24-bit QPU has been installed at the NQCC. Is that contract largely over and that gross margin overhang kind of now in the rearview mirror or are there still revenue to be collected under that NQCC contract that we should just be thinking about as we model gross margin over the next couple of quarters?

Jeff, you want to answer the question? I don't know why Jeff is having a problem with his audio stream. But to answer your question, we expect NQCC contract to continue through the first quarter of 2025, and at that point, the NQCC current contract will end. We are working on a new contract with them, but the terms of that have not been decided yet. So the current gross margin challenge will continue through Q1 2025 with NQCC.

Got it. Thank you, Subodh.

Yeah.

Thank you. And our next question coming from the line of Krish Sankar with TD Cowen. Your line is open.

Hi, good morning. Thanks so much for taking my questions. This is Steven calling on behalf of Krish. Subodh, maybe if I could ask a couple more questions on the quantum error correction front. In terms of the announced progress with Riverlane during the quarter, just kind of curious what's the next major development milestones might be in terms of collaboration with Riverlane? And also kind of related to the work that NVIDIA and quantum machines are showcasing with your system at, I think some of the research that they published and also the system that's now installed at the Israeli Quantum Computing Center. Just kind of curious, like, for that work, does that tie in tightly with the work you're doing with Riverlane, or is that related apparel effort that more that ties in more to feeding back to your fundamental quantum devices and how that tuning is performed to get better and more repeatable fidelity rates?

Certainly. There are two distinct questions here. First, regarding NVIDIA, we are partnering with them at the Israeli Quantum Computing Center to comprehend how a QPU interacts with both CPUs and GPUs from a fundamental perspective. This understanding is crucial for our company and the industry as a whole, emphasizing the significance of superconducting quantum computing. Our technology operates at tens of nanoseconds speed, enabling effective communication with contemporary CPUs and GPUs and maintaining data flow. Other methods, such as trapped ion and pure atom systems, although they may offer slightly higher fidelity, are considerably slower—about 10,000 times less capable. Therefore, trapped ion or pure atom quantum computers cannot maintain an active communication loop with CPUs or GPUs. This is why the work being done with NVIDIA GPUs and our own is essential for understanding the advantages and disadvantages of different GPU configurations and managing data flow effectively. This is the essence of hybrid computing, and we are firmly dedicated to exploring how quantum computing integrates into the wider hybrid data center ecosystem. Now, regarding error correction, we have significant work ahead. We are just beginning this journey. In the CMOS and classical semiconductor industries, extensive error correction research has occurred over the past few decades. The complexities we face in quantum computing arise from the interaction of qubits. It isn't as straightforward as retrying a faulty CMOS transistor; we need to consider multiple couplings, and a failure in one coupling doesn't necessarily imply issues with others. This complexity complicates quantum error correction, which is why our collaboration with Riverlane, who specializes in this area, is vital. They're actively sharing their roadmap and insights, and there’s substantial industry movement in quantum error correction, especially regarding how it differs from classical methods and the challenges ahead. From our end, improving hardware quality—higher fidelity and faster gate speeds—will contribute positively. However, for effective quantum error correction, we must leverage both hardware capabilities and software advancements. I hope this addresses your question.

Yes, that does. Thank you for that, Subodh. And I guess for my follow-up, I just had a question for Jeff on the P&L in terms of operating expenses. Just given the comments on higher sales and marketing spending, lobbying efforts and then also looking ahead to the development efforts on the 9Q and 6Q module system for next year. Any thoughts on whether we should be following for quarterly OpEx to be closer to that $19 million to $20 million range, or could it be higher than $20 million per quarter for OpEx?

Yeah. Are you able to hear me?

Yeah, we can.

Okay. All right. I don't know why the technical difficulty before. I mean, I don't think we'll see a significant increase in OpEx going forward. We are planning for a handful of new hires over the course of the next year. And as we had noted, we are starting to spend some more on sales and marketing. But I don't think it'll be significant or material. So I would expect our OpEx to remain in line or slightly higher than what we've seen in the most recent quarters.

Great. Thank you.

Thank you. And our next question coming from the line of Brian Kinstlinger with Alliance Global Partners. Your line is now open.

Great. Thanks for taking my questions. Subodh, if the incoming administration is successful in getting the Quantum initiative reauthorization passed, does this lead to more government R&D procurements? I guess I'm curious how Rigetti might benefit in the short to medium term if this does pass.

Thanks, Brian. I mean absolutely the NQI Reauthorization Act that is being debated in our Congress right now is critical for our funding in 2025 and the next few years. Right now there are multiple versions. The latest version at least in the Senate has a significant increase in quantum funding. The original NQI was $500 million over 5 years. The NQI reauthorization at least right now the number that is being discussed is almost 5 times higher. So we are talking $2.5 billion over 5 years. So assuming the NQI authorization is passed at that level, certainly it will help all quantum computing companies based in the U.S. and certainly we expect funding that we receive from places like Fermilab and Oak Ridge National Lab will increase substantially. In addition, and I mentioned this earlier, the Department of Defense also does fund quantum computing through several different initiatives, and there is a DARPA program for what they call benchmarking initiative that's a sizable program on the order of $300 million over 7 years. So we certainly hope we can get some of that. So the amount of dollars that the U.S. Government is planning on investing in quantum computing is related to increase significantly. We are talking 4x, 5x increase starting 2025. And we certainly are looking forward to getting those bills authorized and appropriations done so we can start benefiting from that.

Great. Thank you. And then as you continue to improve fidelity rates and meet your roadmap goals and with the new news on tiling, what are potential government customers? How are they reacting? And are you making any progress on some of the RFPs you've discussed in the past? Maybe not specifically on which countries, but you've mentioned you have a handful of RFPs out there.

Yeah. I mean, the customers we talked to like the DOE, DoD, and some other governments like the UK government and so on, they like our tiling approach and the ABAA using. I mean, they believe and we certainly believe that that's the right way to scale up qubit count. I mean, it's easy to say you can keep increasing the size of the chip, but it's not trivial to build 100 and thousands of qubits of, monolithic chip whereas tiling is a lot more practical. That's why the CMOS industry does it and that's why we think it's the right time to bring tiling in. So we certainly feel confident that's the right way to go about doing it. Some of our competitors so far have not ventured in this area. Could be because we have a lot of IP in this area, but also maybe other factors. We certainly think tiling with the assisted bias is the right way to scale up qubit count, the hundreds and thousands of qubits over the next few years, and we are committed to it. So far, we have not seen any negative impact and obviously, we see a lot of benefits in timing in terms of scale-up. So we continue to push that one.

Great. Thanks. And my last question is assuming you can continue to stay on your technology roadmap and reach 100 qubits at 99.5 median fidelity, how, if at all, does this change QPU purchases for R&D purposes? Is it unimpactful or do you think you might start to see a little bit more adoption from other government labs?

Well, assuming we execute our roadmap and we feel pretty confident we will, so let's say we are at 100-plus qubit at 99.5% median to qubit capability by this time next year, along with error correction that we talked earlier about. I mean, certainly you start having a quantum computer that is capable of doing effectively what we call nano-quantum and one type applications who take some practical applications and demonstrate superiority in terms of performance or cost and that certainly will increase the appetite for the U.S. government but other governments to start doing more research with quantum computing. Already the list of countries that have a quantum mission and plans to invest in quantum computing is getting to be on the order of 15 or maybe even 20 countries now, and when they see that we are becoming more and more practical in terms of taking on real-life applications and demonstrating some superiority, I have to believe that will increase the funding situation at the various government levels. So we certainly think as we continue to execute our roadmap, the opportunities for sales to these research customers, primarily government, national labs, university academic kind of researchers will continue to increase. I mean, we have already quantified in our investor presentation that, along with IDC report, the market opportunity for business research applications in the next 5 years is roughly $7.5 billion. So it's a pretty sizable market, and even if it's still talking to you, which I just point, it's still a very sizable market and that's really what we are focused on right now, getting our quantum computing capable to take on those kinds of applications, research applications and get a foothold in that $7.5 billion marketplace in about 5 years. Thanks, Brian.

Thank you. And I'm showing no further questions in the queue at this time. I will now turn the call back over to Dr. Subodh Kulkarni for any closing remarks.

Thank you for your interest and questions. We look forward to updating you after the beginning of the New Year with our fourth-quarter results and full-year 2024 results. Thank you again.

Ladies and gentlemen, that does conclude our conference for today. Thank you for your participation and you may now disconnect.