Rigetti Computing, Inc. (RGTI) Q3 2026 Earnings Call Transcript

Ladies and gentlemen, thank you for standing by. Welcome to the Gede Computing Third Quarter 2026 Financial Results. At this time, all participants are in a listen-only mode. After the speech's presentation, there will be a question and answer session. To ask a question during this session, you will need to press star 11 on your telephone. You will then hear an automated message advising your hand is raised. To withdraw your question, please press star 11 again. Please be advised that today's conference is being recorded. I would like now to turn the conference over to Sabode Kulkarni, President and Chief Executive Officer. Please go ahead.

Good afternoon, and thank you for joining us for Rigetti's third quarter 2026 results conference call. I'm pleased to be joined today by our Chief Financial Officer, Jeff Berdelsen, who will review our financial results in more detail following my remarks. We appreciate your continued interest in Rigetti and look forward to answering your questions at the conclusion of our prepared remarks. Before we begin, I would like to remind everyone that today's call Along with our third quarter 2026 earnings release contains forward-looking statements. These statements reflect our current expectations, objectives, and underlying assumptions regarding our outlook, technology roadmap, customer deployments, government programs, and future operating results. We are subject to risks and uncertainties that could cause actual results to differ materially from those anticipated. These risks and uncertainties are described in more detail in our filings with the Securities and Exchange Commission, including our Form 10-K for the year-ended December 31, 2025, our Form 10-Q for the quarter-ended September 30, 2026, and other periodic reports filed from time to time with the SAC. Brigetti undertakes no obligation to update any forward-looking statements made during this call, except as required by law. During today's call, we will also refer to certain non-GAAP financial measures. For details on these measures and reconciliations to comparable GAAP measures, please refer to today's earnings release on our Investor Relations website and to the Form 8K furnished with the SEC. Before reviewing our quarter, I want to frame our discussion around three key takeaways. First, we achieved 99.5 median 2 qubit gate fidelity on CFIUS-1108Q. This is a significant milestone that demonstrates continued performance improvement at the 100-plus qubit system level, not only on a smaller research device. It also provides further validation of our chiplet-based approach to scaling superconducting quantum computers. Second, we strengthened our position with the U.S. government. During the quarter, we signed a definitive agreement with the U.S. Department of Commerce for $100 million in funding to accelerate research and development in three areas that are important to scaling superconducting quantum computing. Good. We are advancing the next phase of our technology roadmap. Rigetti's superconducting systems continuously achieve gate speeds of 50 to 70 nanoseconds, which is about 10,000 times faster than trapped ion systems and 100 times faster than neutral atom systems. Our next major system objective is to demonstrate a 300 plus qubit system with approximately 99.7% median 2 qubit gate fidelity. and gate speeds below 60 nanoseconds by mid-2028. In about three years, we aim to deploy a system with approximately 1,000 qubits, 99.9% median 2 qubit gate fidelity, gate speeds below 50 nanoseconds, and integrated error correction and mitigation. For our 1000 plus qubit system, We plan to increase the density of qubits in a single fridge, as opposed to networking multiple fridges together. Our view is that this approach enables higher performance at a lower cost on the path towards building systems with thousands and eventually tens of thousands of qubits. We believe this combination of scale, fidelity, and speed could provide a platform for demonstrating quantum advantage. Also integral to our roadmap is quantum error correction. Taken together, these developments represent meaningful progress across the three areas that matter most for rigetti. Quantum processor performance, scalable system architecture, and our ability to deliver reliable systems to customers. Let me begin with our technology progress. During the third quarter, CFIUS-1108Q achieved 99.5% median 2-qubit gate fidelity, achieving our system milestone and further validating our chiplet-based QPU architecture. CFIUS-1108Q also demonstrated fidelities of 99.6% on an 80-qubit sublattice and 99.7% on a 50-qubit sublattice. The system continues to operate at approximately 99.9% median single-qubit gate fidelity and gate speeds of approximately 60 nanoseconds. CFIUS-1108Q is built from 12 interconnected 9-qubit chiplets, so the result demonstrates our ability to improve performance while operating a modular system at commercial scale. This is central to our strategy. We do not believe scaling requires choosing between qubit count, fidelity, and speed. Our objective is to advance all three in a coordinated manner while preserving system reliability and usability. The progress reflects work across chip design, materials, fabrication processes, calibration, and system engineering. In particular, our teams have continued to incorporate learnings from our 9 qubit and 36 qubit research platforms. We have also continued work to improve coherence and reduce sources of loss and crosstalk, including chip design optimization, materials improvements, and process refinements in and around the Josephson Junction and superconducting interfaces. In the second quarter, we identified coherence times of approximately 25 to 30 microseconds as the primary constraint on further fidelity improvement. We continued initiatives, both internally and with partners, to improve that performance. Importantly, we approach performance improvements holistically. CFIUS-1108Q is available to users through Rigetti quantum cloud services and third-party cloud platforms, and reliability and consistent uptime remain priorities. Before deploying performance improvements, we test them across the system to confirm that gains in one metric do not compromise another. That discipline will remain important as we move to larger systems. Building on our improved system performance, we are updating our roadmap with a target of 300-plus qubit systems with approximately 99.7% median two-qubit gate fidelity. and sub-60 nanosecond gate speed by mid-2028. This target is designed to advance a combination of scale, fidelity, and speed that we believe will be necessary for commercially relevant quantum computing. Qubit count alone is not a sufficient measure of system capability. Higher fidelity increases the useful depth of quantum circuits, while fast gate speeds allow more operations to be completed within the available coherence window. The combination is particularly important for hybrid quantum classical computing, where quantum processors will need to operate effectively alongside CPUs and GPUs. Our chiplet architecture remains the foundation of this roadmap. CPS1108Q demonstrated that multiple identical chiplets can be tiled into a larger system. Our next phase will extend that approach through higher-density chip architectures, improved interconnects, Expanded cryogenic capacity, and more compact readout and control electronics. The architecture is intended to let us iterate at the chiplet level, test and validate devices before system integration, and scale through modular building blocks rather than depend exclusively on increasingly large monolithic ties. The new roadmap also reflects the three programs covered by our definitive agreement with the U.S. Department of Commerce. Those programs are focused on compressing read-out electronics into an integrated, miniaturized package, expanding cryogenic capacity by orders of magnitude using a new cryostat architecture, and developing fabrication capabilities for high-connectivity chip architectures. These are not peripheral research projects. They address practical system bottlenecks that become increasingly important as qubit count grows. More compact readout electronics can reduce system complexity and improve scalability. Greater cryogenic capacity can support substantially larger systems. Higher connectivity chip architectures can improve how qubits interact and enable more efficient quantum error correction techniques. In September, Rigetti signed a definitive agreement with the Department of Commerce for up to $100 million in funding under the CHIPS Research and Development Office Broad Agency Announcement. As a condition of the award, the department received a minority, non-controlling equity stake in Rigetti. We view this agreement as an important validation of Rigetti's technology and of the strategic roles superconducting quantum computing can play in maintaining U.S. leadership in an area with significant national security and economic implications. The funding is designed to accelerate specific research and development programs that are directly aligned with our roadmap. Jeff will discuss the financial and capital allocation considerations in greater detail. Our commercial strategy is designed to make customers where they are. For customers that want direct hardware access and integration into their own research environments, we offer on-premises systems. For users that want to leverage AQPU without purchasing a system, our systems are available on our own cloud platform, QCS, and Amazon Bracket, Microsoft Azure, and QBraid. We are also advancing hybrid quantum classical computing through our collaboration with HPE and Pittsburgh Supercomputing Center, where a complete 9-qubit Novera system is expected to be integrated into the Tangle Lab testbed in 2027. At this stage, most quantum computing remains research-oriented. Customers are developing algorithms, building internal expertise, and evaluating how quantum processors could fit into their computing environments. That makes system access, reliability, ease of use, and customer support important today, even before the industry reaches broad quantum advantage. Our priorities are therefore clear. First, continue improving processor performance across fidelity, coherence, connectivity, and gate speed, while advancing real-time quantum error correction with River Lane. Second, execute against the 300-plus qubit roadmap target for mid-2028, while maintaining a disciplined, test-driven approach to system integration. Third, use the Department of Commerce funding and our balance sheet with discipline, directing capital towards the technical programs and infrastructure that most directly advance scalable superconducting quantum computing. We believe the third quarter marked an important transition for Rigetti. We continue to improve CFIUS-1108Q performance and finalize our $100 million agreement with the U.S. Department of Commerce. There is substantial work ahead, and execution remains the priority. We believe this accomplishment strengthened the foundation for the next phase of our roadmap and reinforced Rigetti's position as a leading developer of modular, superconducting quantum computing systems. With that overview, I will now turn the call over to Jeff to discuss our third quarter financial results, balance sheet, and capital deployment in more detail.

Thank you, Subodh, and good afternoon, everyone. I will review our third quarter 2026 financial results, provide perspective on our year-to-date revenue performance, and discuss our balance Sheet, liquidity, and capital position. For the first nine months of 2026, revenue was $10.9 million, compared with $5.2 million for the first nine months of 2025, representing growth of approximately 110%. Revenue through the first nine months of 2026 also exceeded the $7.1 million of revenue reported for all of 2025. This performance reflects contributions from on-premises system sales. and our continued execution against customer and government programs. Third quarter revenue was approximately 1.4 million, compared with 1.9 million in the third quarter of 2025. The revenue decline from the prior year period reflects the timing of system deliveries, customer acceptance milestones, and government-funded development programs. Quarterly revenue can vary meaningfully because recognition is tied to a relatively small number of system deliveries and contracts. We therefore believe year-to-date revenue provides a more useful view of our progress at this stage of the market. Gross margin for the third quarter was approximately 61%, compared with approximately 21% in the third quarter of 2025. As we have discussed previously, gross margin can vary meaningfully from quarter to quarter based on contract mix, pricing, system configuration, and the timing of hardware revenue recognition. Total operating expenses for the third quarter were $34 million, compared with approximately $21 million in the same period last year. Research and development expense was $25.5 million, and selling, general, and administrative expense was $8.5 million. The year-over-year change reflected higher costs for salaries, employee benefits, and stock compensation, primarily for new hires and existing employees in research and development, along with additional costs for research and development activities related to our goals of achieving quantum advantage and large-scale fault tolerance. Stock-based compensation for the quarter was approximately $8 million compared with approximately $4.3 million in the third quarter of 2025. Operating loss was $33.2 million compared with $20.5 million in the prior year period. On a GAAP basis, net loss for the quarter was $3.1 million, or $0.08 per diluted share, compared with a net loss of $201 million, or $0.60 per diluted share, in the third quarter of 2025. GAAP results for both periods were affected by non-cash fare value adjustments to derivative warrant and earn-out liabilities. These non-cash adjustments can create significant quarter-to-quarter volatility and do not affect how we operate the business or allocate capital. On a non-gap basis, excluding stock compensation and fair value adjustments to derivative-worn and earn-out liabilities, Net loss for the quarter was approximately $20.5 million for $0.06 per diluted share, compared with a non-GAAP net loss of $10.7 million for $0.03 per diluted share in the third quarter of 2025. Turning to the balance sheet, we ended the third quarter with $497.1 million in cash, cash equivalents, and available for sale investments. Compared with $541.3 million as of June 30, 2026, $589.8 million as of December 31, 2025. We continue to operate with no debt. Net cash used in operating activities was $49.1 million for the first nine months of 2026, compared with $43.6 million in the prior year period. Cash used for capital expenditures was $42.6 million for the first nine months of the year. As we noted last quarter, 2026 capital expenditures are elevated relative to prior years, primarily due to investments in dilution refrigeration capacity, BAB1 equipment, and infrastructure required to support higher cubic count systems. These investments are aligned with the technology roadmap SUBO discussed and are intended to support both processor development and future customer deployments. In September, we entered into a definitive agreement with the U.S. Department of Commerce for up to $100 million in funding under the CHIPS Research and Development Office Broad Agency announcement. Funds will be available under this agreement on a monthly basis as costs are incurred. In connection with the agreement, we issued approximately 7.7 million shares of common stock to the department, representing a minority, non-controlling equity interest. For accounting purposes, the entire $100 million will be allocated to the common shares that were issued. Eligible project costs will be capitalized or expense under normal U.S. GAAP accounting. As cash under the award is withdrawn, we will report a credit to additional paid-in capital, assuming that retention of the funding is probable. If retention is not probable, we will recognize a liability until any prepayment contingency is resolved. As Subo described, the award supports programs directly aligned with our technology roadmap. We intend to use the funding to execute against the agreed milestones while maintaining the same discipline that governs our broader research and development spending. Our capital priorities remain unchanged. We are directing investment toward core technology development and the system delivery capabilities required to manufacture, install, and support On-premises system. Our balance sheet and the Department of Commerce Award provide the resources to pursue the roadmap while maintaining financial flexibility, and we will continue to pay spending against measurable technical and operational progress. In summary, revenue for the first nine months of 2026 increased from the prior year period and exceeded revenue for all of 2025. Our balance sheet and the Department of Commerce Award provide substantial resources to advance our roadmap, and we remain focused on aligning capital deployment with measurable technical progress and long-term value creation. For full year 2026, we expect revenue of approximately $20 million, representing significant growth compared with 2025. This outlook assumes customer acceptance of the CDAC system in the fourth quarter and recognition of the associated revenue in that period. With that, I will turn the call back to Savoud for closing remarks before we open the call for questions.

Thank you, Jeff. The third quarter demonstrated progress across technology, customer execution, and strategic Thank you. We achieved 99.5% median two-qubit gate fidelity on CPS-1108Q and signed a definitive $100 million agreement with the U.S. Department of Commerce. We are now focused on the next phase of execution, including our target of a 300-plus qubit system with approximately 99.7% median two-qubit gate fidelity and gate speeds below 50 nanoseconds by mid-2028, as well as ongoing error correction work with River Lane. On behalf of the entire GATI team, thank you for your continued interest and support. Operator, we are now ready to open the call for questions.

Thank you, and as a reminder, to ask a question, please press star 11 on your telephone and wait for your name to be announced. To withdraw your question, please press star 11 again. The first question comes from Kevin Gargan with Jeffries. Your line is now open.

Yeah. Hey, team. Thanks for taking my questions. Hey, this is about great progress on the 108 qubit system getting to 99.5% two qubit fidelity. You know, you highlighted 99.7% on a 50 qubit sublattice. Can you just help us understand what's driving the performance difference between the sublattices and the full systems? Is it, you know, lower performing qubits or couplers or what's kind of going on there?

Thanks, Kevin. Fundamentally when we do our measurements, there's always a distribution around the median by definition. So when we said that our 108 qubit CPS system has reached 99.5%, it's a median number that by definition means half the qubits are below that and half are above that. And there's always a statistical distribution. What we noticed is there are many qubits, in this case, as many as 50 plus qubits at 99.7% median two qubit gate fidelity. And the reason it's important to highlight is because once you start reaching those kinds of fidelity numbers, 99.7 and 99.8, and certainly 99.9, you can really start using quantum computers with error mitigation, error correction, and start doing some real practical applications. Not that they will be superior to classical computing quite yet. For that, we still think we need to get to that quantum advantage, which is the thousand qubits at 99.9 with the speed and error mitigation and correction. But it certainly gives researchers who are using quantum computers a lot better platform to take sub-lattice. So essentially, it's part of the 108Q grid that they can take if their application doesn't need all 108 qubits, and most applications don't need 108 right now. So they can take a sublattice with better performance and try it out. So it just gives them more options, and that's why we disclosed the information there. Hopefully that answers your question.

It does, yes. Thank you for that. And as a follow-up, just on future systems, you mentioned they're going to incorporate more qubits per chiplet. Is there an optimal chiplet size that you're targeting, or how should we kind of think about the tradeoff between increasing number of qubits on each chiplet and maintaining that manufacturing yield and fidelity?

That's a good question, Kevin. And right now, our 108-qubit system uses a 9-qubit chiplet, a 3x3 grid, essentially. We plan to stay with the square configuration for the foreseeable future. So we are experimenting with... Six by six, so 36 qubit chiplets, and eventually we'll go much higher than that. There's no limit, per se, on how large of a chiplet one can make. I mean, you obviously, the real reason we use chiplets is because it's a lot easier to build a smaller dimension chip than a larger dimension chip. And so a nine qubit chiplet right now is roughly six millimeter by six millimeter, which is a lot easier to build than a 108 qubit, which would be a lot bigger than that. But there's no real limit on how many qubits can we get on a chiplet. So we'll certainly take the next step sometime soon to get to like 36 qubit chiplets. That's what we think we will need to build a thousand qubit system roughly three years from now. But there's no limit. We could go beyond 36. We'll stay with those square configurations. So ultimately, we are talking about 64, 81, and keep going from there as we start talking about thousands of physical qubits.

Okay, perfect. I appreciate the color, and congrats on the progress. Thanks, Kevin.

And our next question will come from Craig Ellis with B. Riley Securities. Your line's open.

Yeah, thanks for taking the question, and congratulations on the error correction progress, guys. Subodh, I wanted to check in on the 300-qubit system that's come into the Roadmap. What is magic about 300 versus a qubit count that would have been either less or greater than that? And then what will be the gaps to close between that 300 qubit system and the 1,000 qubit system that you have had and keep on your roadmap? Thank you.

Thanks, Greg, for that question. I mean, first let's... We reflect about the 108 qubit system that we have deployed right now. As you probably know, there's only a couple of good companies besides us who have more than 100 qubit system right now in the marketplace. IBM at 108 qubits and Google at, I mean, IBM at 120 qubits and Google at 105 qubits and then Continuum comes close at 98 qubits and just about everyone else is like less than 65 qubits as far as we can tell from publicly deployed systems. Yeah, now it's a lot, but when you look at what's actually available, you know, It's really we are the second best system out there at 108 qubit from a qubit count standpoint. So it's not trivial to get to 100 plus qubits and make it publicly available because it's stable, it's consistent, reliable, and so on. To go to 300, it's a big step. We definitely use our chiplet strategy, which gives us a leg up when it comes to scaling up. There's no real hard and fast any particular reason why we chose 300. It was roughly three times more than where we are and roughly three times less than the real milestone, which is 1,000 kilobytes. So most of our effort really is talking about Getting to 1,000 physical qubits at that 99.9, roughly three years from now, we thought a 300 would be a good intermediate milestone, roughly halfway, so about 18 months from now. Demonstrating that the chiplet strategy continues to work to scale up at good fidelities and good speed and so on. So if you notice, we have essentially taken kind of a midpoint between where we are today, where we need to be roughly three years from now, and that's what the 300 came to. But there is no certain reason. I mean, it's not like suddenly you are going to enable practical applications at 300 kubits. It would be obviously better than 100 kubits, but it's not going to be enough, we believe, to demonstrate quantum advantage. For that, we still believe we need to get to 1,000 physical kubits at that 99.9 plus better than 100 kubits. And 15 nanosecond gauge speed with error mitigation and control.

Does that answer your question? Yeah, it does. And then I think it was in the press release there was mention made of the ambition to scale up cubic count with larger dilution refrigerators rather than interconnecting devices. Can you just talk more about what the company is thinking about there and what the catalyst would be to go from a larger dilution refrigeration system into networked dilution refrigerator systems? Thank you.

Yeah, thanks for that question, and that certainly is an exciting development that we have seen Based on our data, that we believe we can. Get to a thousand physical qubits, and well beyond that, in a single dilution refrigerator. When you do that, obviously, you get huge advantages, both from a performance standpoint, but as a cost standpoint. From a performance standpoint, because with the chiplet strategy we have, you're using an interposer, a lot less complications, and physical wires and stuff like that. So we are really relying on Silicon technology, if you will, and all of the semiconductor industries know-how that we have. So that gives you tremendous performance advantage when you're dealing with chip-lit approach. But also cost. I mean, any time you talk about multiple dilution refrigerators and networking them, it adds to tremendous cost. So we think the strategy with maximizing the qubit counts in a single dilution refrigerator is good from both performance as well as cost standpoint. We feel very confident based on our current results that we should be able to get to certainly 300 qubits and even 1,000 qubits with a single dilution refrigerator. Frankly, we don't We see a thousand qubits as a limit. We will continue to increase the qubit count per chiplet and the number of chiplets and we think we can go much beyond a thousand physical qubits in a single dilution refrigerator. Some others have gone in or believe their roadmaps are showing a different direction. They are talking about maxing out the number of qubits to like a couple hundred or three hundred and then networking Which is possible, but as I said, we think it will come at a performance penalty and a cost penalty. So we definitely think our approach in leveraging the chip-led technology is a superior one in the long term.

Congratulations on that. Look forward to hearing more. Thanks, Subodh. Thanks, Greg.

And our next question is going to come from Gary Mobley with Sonex. Your line is open.

Good afternoon, everybody. Thanks for taking my question. Subodh, I realize that you're primarily focused on the company's roadmap and accelerating the roadmap and keeping that horse before the cart, so to speak. But how would you characterize the sales pipeline for the company in the interim, you know, relative to maybe a year ago? And, you know, what's driving the sales pipeline? Is there anything?

It's a good question, and we discuss it a lot internally, Gary. Our general view is that quantum computing still is very much in R&D phase. We need to perfect the technology before we can really expect commercial sales to take off. When we say that, what we mean is... We need to be able to demonstrate ROI to data center managers before we can start really investigating quantum computing, whether using it in cloud or using it on premises in the data center. And none of us are at a point where we can demonstrate ROI with quantum computing or classical computing. So we still need to improve the technology before data center managers start using it for commercial applications. And we believe we are roughly about three years from that point. In the meantime, certainly a lot of researchers, national labs, universities, but even some commercial companies where they're doing quantum computing research, are interested in using quantum computers, whether they are in cloud, whether public clouds like AWS or Microsoft Azure, or sometimes getting them on premises. And that's why we offer both on the public cloud as well as on premises. But that's primarily for research application. So our view is that even though that constitutes sales and... Oh, sometimes. One-off kind of things. That's not the right metric while we are continuing to develop the technology. So overall, our view is to continue to stay focused on technical metrics till we get closer to the quantum advantage, and that's really when we expect sales to take off significantly. But certainly, overall, the interest continues to grow rapidly in quantum computing. If you look at the number of users who are using our 108 kbit system on publicly available clouds, that number continues to increase. Our system is one of the most reliable, consistently performing systems available on public clouds right now, and that definitely gives us a good vantage point in seeing how customers are using it, what they are seeing from it. So we definitely see good interest, and that definitely will mean better sales potential, even in the research stages. But we don't think it's the right metric to follow until we reach quantum advantage, and we think that's roughly three years from now. Hopefully that answers your question and puts it in context.

It does. I appreciate the response. Now, on fab strategy, do you think you've got the right strategy based on a nine-qubit chip architecture, or is there maybe a pivot in the future of the company where you might need to have a little bit more qubit density or larger chip size, for that matter?

We absolutely will increase the qubit count per chiplet. Right now our chiplet is 9 qubit and we are using 12 of them in the 108 qubit system. There's absolutely no limit on that as I mentioned in one of my earlier answers. We will certainly go up to 36 qubit chiplets sometime soon, but there's no limit to that. We can certainly continue to increase the qubit density. If you think about it, I mean right now our qubits physically are in the tens of nanometer range. And they are spaced quite a bit apart, practically millimeters apart, in semiconductor language that's almost miles apart from each other. So, we have plenty of lateral distance to improve. We may not get to the 3 nanometers that semiconductor industry needs for . But there's plenty of room from where we are right now to the most advanced nodes in semiconductors. So, we continue to Increase. Our qubit density on a single chiplet, and we'll continue to increase the number of chiplets. So we remain convinced the chiplet strategy is a very key strategy to scale up. It's a very practical way to scale up, enabling better performance and cost, because you can fit in everything in a similar DR, as I mentioned earlier.

Thanks again. Thanks. And our next question will come from Krish Sinker with TV Cohen. Your line's open.

Yeah, thanks for taking my question. So we'll add two similar questions. On the pipeline, is there maybe you can talk about how the pipeline is trending for either orders or backlogs, both current and Euro-world basis, and how do you think over the next couple of quarters on that?

Thanks, Krish. Again, we generally spend a lot more time about technical metrics and sales. We continue to talk to key customers like national labs and universities and a few commercial customers doing quantum research. We definitely, based on the overall interest in quantum computing, we expect more and more sales to grow. But again, they are relatively small in the big scheme of things because it's all still R&D going on. Jeff, do you want to add anything about the pipeline or backlog?

Yeah, I mean, I guess I'd echo what you said, Sabode. I mean, it's still early days in quantum computing, but for sure, you know, we see growing interest in governments, government labs, and, you know, and also some commercial customers, you know, like the, you know, Tanglewood opportunity or sale that you mentioned. Today. So, yeah, directionally, for sure, you know, there's growing interest. And, you know, we would expect over the next few years, you know, to see can continue growth and interest from customers and growth opportunities. So, as we get closer to quantum advantage and as the systems become, you know, more capable.

Got it, got it. And then, Subhat, you mentioned in the chiplift strategy, there's no limit on the maximum size. I'm just wondering, as you scale up the size, are there any interconnect performance or fidelity to rate-related penalties that you have to deal with?

Good, good, good. Great question, Krish. As of today, we have limitations coming from connecting chiplets, and we don't see any performance deterioration because we are using an interposer and going through the interposer to connect the two chiplets. That doesn't mean at some point we may not see some negative penalties because of a larger grid. But as of today, we don't see any issues with at least our 12 9-qubit chiplets. So we feel pretty good that when we talk about 1,000 qubits, we are roughly talking We're talking about 30, 36-qubit-type chiplets, and we don't anticipate any issues. But certainly, that's a key area we keep monitoring to see if there are any fundamental limitations that are coming while we scale up. But as of today, we don't see any limitations coming up.

Thanks.

Thanks.

And our next question will come from Quimbleton with Needham and Company. Your line's open.

Hey, guys. Let me echo the congratulations on the progress with CEPHIS-1108. So, but I guess I wanted just to start on sort of some of the, you know, interest you're seeing from government labs or, you know, government agencies. I'm wondering if you could give us any updates on your status or progress with DARPA QBI, but also the UK ProCure programs?

Sure. So, as you see from the news cycle, almost all the advanced countries around the world Have some kind of a quantum mission or a quantum strategy right now because everyone understands the importance of quantum computing for national security reasons and the potential of quantum computing over the next few decades. So you see many governments having some kind of a We're all a comprehensive quantum strategy. We, in particular, are very closely aligned with U.S. government, U.K. government, and increasingly with the Indian government because of the CDAC system. But we continue to talk to other governments around the world that have interest in quantum computing. Overall, we have to be careful while we are continuing to, our focus continues to be technology development. So all these other interactions that we do, there is a little bit of, we have to be careful how many of the governments we interact with because each one needs dedicated resources and support staff and so on. We continue to, obviously, We have installed quantum computers at the DOE lab, specifically Fermi lab in Chicago, and the DOD lab, Air Force Research Lab in upstate New York. We have a quantum computing system in the UK, national lab, outside Oxford, and now we are bringing up the quantum computing system in India, India's national lab, CDAC. We'll continue to do those kinds of strategic deals where it makes sense, which advances our technology as well as enables sales. We are very much part of the U.S. government's commerce initiative, the whole CRDO initiative, and that's the $100 million we talked about. That is extremely valuable to us because it's helping us develop technology and pull in our timelines. So those are very good strategic initiatives that we are part of. We continue to talk to DARPA on QBI as well as the UK's Procure program. As we have anything to disclose, we will do that. But expect more and more initiatives along those lines from not only the US, UK, there will be other programs from other countries as well, and we will certainly participate as it makes sense as long as it fits our overall strategy.

Does that answer your question? Yeah, no, that's very, very helpful. And then the second question, just for Jeff, maybe I wanted to better understand, you sort of said with the Department of Commerce milestones, Costs would be sort of expensed or capitalized as incurred, but how does the $100 million of funding flow through either the balance sheet, the cash flow statement, the income statement, it doesn't look like you have $100 million receivable, you know, for that yet, and so just trying to make sure we understand how that $100 million will flow through the financial statements.

Sure. So it's going to really flow all through equity as we draw down funding from the government. So the whole $100 million of funding from commerce is going to be allocated basically to the 7.7 million shares that we issued, and it will go to equity. We get to... We'll draw down money on a monthly basis as we incur costs, and as we do that, we'll basically credit those funds each month to additional paid-in capital. So you'll see the funding flow through the cash flow statement. You know, every quarter as we draw down from the government. And then any costs we incur under the program will just flow through R&D or CapEx as you typically would expect to see it. So I sort of think of it as a $100 million equity offering with some stipulations on use of proceeds, if you will.

But the $100 million of cash isn't on the balance sheet today, right? So you'll sort of draw down on those funds with costs incurred? Correct. Correct. So how does that go through every quarter?

Yeah. So as of September, we hadn't drawn any of the $100 million yet because the program was just getting started and we really hadn't incurred any costs. So, you know, if you think about it, if I... If I can withdraw or draw down $100 from the Department of Commerce, I'm basically going to be, you know, get to real simple terms, debiting cash and crediting equity.

Yeah, okay, so it'll... Right, so we'll get the $100 million. The income statement is unchanged. You'll still have the $100 of costs in R&D, and it really just sort of – you'll see on the cash flow statement sort of the $100 coming into the cash flow statement to offset those $100 million of – got it. Okay. Thank you.

And our next question is going to come from Brian Kinslinger with Alliance Global. Your line is open.

All right, thanks so much. The next major data point on the roadmap is mid-2028. During the next 18 months or so, should we expect to see gradual increases in QPU size or fidelity and speed to CFS? What are the KPIs we should be tracking in the meantime for progress?

A good question, Brian. We'll absolutely continue to improve our fidelity and... Qubit count along with speed and talk about error mitigation and error correction along with our partnership with Riverlane as we go along. So we will disclose key milestones when we meet them. I mean, as I said, right now we are at 108 qubits at 99.5, median 2 qubit gate fidelity with sublattices at higher numbers, about 60 nanosecond gate speed. And as we improve any or all of these numbers, we will disclose, we will deploy them as appropriate. It doesn't make sense to keep deploying systems on public cloud every time you improve just one number slightly. So we take a conscious look at. Whether it would be worth it for end users to switch to a new platform. And if it makes sense, we would absolutely deploy a system and publicize that we have deployed it. So definitely continue to look at key metrics from us, the three big ones being fidelity, namely two-qubit gate fidelity, but along with other kinds of fidelities too, like parallel fidelity or readout fidelity, we'll start talking more about those kinds of numbers as we get closer and closer to 99.9%. and two-qubit gate fidelity, certainly physical qubit count. And then speed, which is critical. We refrain from using imprecise logical qubits. We have noticed some companies have started doing that in this space. They are talking about logical qubits, but at 10 to the minus 3 or 10 to the minus 4 error rate. For us, it doesn't quite make sense to talk about imprecise logical qubits. Our view is that logical qubits should be more or less perfect, which means they should be better than 10 to the minus 10th error rate, at least. And so we would refrain from using loose words like logical qubits that some companies have started using in this space because it's very confusing for everyone when you start talking logical qubits at 10 to the minus 3 or even 10 to the minus 5 error rate. But definitely continue to expect us to talk about two qubit gate fidelity along with some of the important fidelities like readout and parallel, physical qubit count, gate speed, and we will talk about error mitigation and error correction as we continue to increase all these numbers.

Great. My follow-up is, can you talk about when error correction becomes a priority in your QPU development, maybe frame it in the context of QPU size and fidelity?

Sure. So our view is that for error correction or even error mitigation to start becoming effective, you really need to get to At least 100 physical qubits and at least 99.7, maybe even 99.8 percent two-qubit gate fidelity. Until you reach those numbers, it really doesn't make sense to talk about error mitigation and error correction. And that's why we have refrained from talking too much about that. We work very closely with River Lane. We do error correction development on our own. We have published a lot of papers in this area. As we get closer to that 99.7, 99.8, and our sublattice already is at 99.7, so that helps us start talking about error correction and error mitigation, even at that sublattice level. Please expect us to talk more about that. Anything less than that, when we see people talk about error correction and they're in like just 50 physical qubits at less than 99.5% two-qubit gate fidelity, frankly, doesn't make sense because your number of errors that you're creating are far more than what you can correct, even with the best possible technology, whether it's FPGA or CPU or GPU, you're overwhelmed with errors. When you are dealing with Sub 99.7, two-qubit gate fidelity. Does that answer your question?

Yeah. Thanks so much, Sigurd.

Thanks, Brian.

And our next question will come from Tyler Anderson with Craig Highland Capital. Your line's open.

Hi. This is Tyler Anderson on for Richard Shannon. Thank you for taking my questions. To start, I wanted to get a little bit of housekeeping done. I saw that the CapEx had increased a little bit, quarter over quarter. So, I was wondering, could you frame how to think about CapEx in Q4? And then, how do we think about CapEx in 2027 in relation to 2026? I have a follow-up. Thank you.

Yeah, I guess I can take that. I mean, You know, as we have said, Tyler, CapEx this year relative to prior years is higher, and it really is due to Us starting to acquire, you know, dilution refrigerators with bigger capacity, some Fab 1 equipment, really as we're starting to, you know, execute against the plan to get to these 1,000, you know, to the 1,000-cubit level in three years. So we're definitely investing in more dilution refrigeration capacity. So that's what you've seen this year relative to the past. You know, relative to Q4, you know, I'm not going to necessarily give a specific number, but I think, you know, as we march into 2027, you know, I suspect you'll see, you know, CapEx in 2027, you know, relatively consistent with what you've seen here in 2026. So we are investing. We are driving towards the intermediate milestone in 2028 and to the 1,000-cubit level, and that is requiring some CapEx investment. So in 2027, I don't think you'll see it go back to where we were in 2025 and 2024, so it'll be closer to where we're at this year when the dust settles.

Okay, great. And then you had mentioned that you were miniaturizing readout electronics. Is this something that you're doing on your own or are you working with partners with this? And for the cryostat architecture, is this something that needs to be worked with, with existing steel fridge manufacturers? And is this? A DILF Ridge that is of a different size in total, or is this a shape or configuration within it? I'm just trying to understand what is going on here and trying to delineate where you're owning all of the R&D that needs to be conducted.

Good question, Tyler. I mean, fundamentally, this common initiative we have, We take the overall risk of delivering to those milestones, so the couple of them that you brought up, one is miniaturizing the readout electronics, and the other is the new cryostat architecture. Clearly, we are not going to be doing everything ourselves, and this is an extremely complex area. There are many other potential partner companies that are good in specific areas. So we are looking at partnership model when it makes sense. So in case of miniaturizing readout electronics, we are working with a couple of partner companies and picked the right technology to help us deliver the milestone to commerce. But we have to understand how the technology interacts with our QPU technology and so on. On the Cryostat architecture, again, we are not a Cryostat company, per se. We are buying off-the-shelf digression refrigerators from three companies right now, depending on the applications. So we are working with one of them to define this new architecture and how it will enable us to go to the 10,000-type qubits or even beyond range. So definitely expect us to be talking about partnership models when it comes to the specific milestones that we are talking about. Hopefully that answered your question.

Yes, it does. Thank you. I appreciate the time.

Thanks, Tyler.

And the next question is going to come from Karen McCabe with Cancer Fitzgerald. Your line's open.

Great. Thank you for taking my questions today. One question, I guess, with approximately $500 million in cash and kind of the correction in the market, are you seeing any kind of inorganic opportunities becoming more attractive, or is it just a mix between deciding to do something internally versus acquiring kind of the same as it was maybe, you know, earlier this year? Kind of a follow-up.

It's a good question. I mean, we certainly continue to monitor the market and look for potential opportunities, only if they will help us accelerate our roadmap or if there's some really key strategic value we see. And obviously, we haven't seen anything so far, which is why we haven't made a move. Fundamentally, we remain convinced that superconducting gate modality that we are using is the one that is more likely to dominate the marketplace because of our strengths and speed and scale. We look at the landscape right now. I mean, our CFIUS 108Q, as I mentioned in one of the earlier answers, The only higher qubit count system available on public clouds is the IBM 120 qubits. We are right after that, and then Google at 105, and then everyone else is below 100, and most of them companies are well below 50. So acquiring someone for the sake of acquiring or acquiring someone for increasing sales, we don't think is the right strategy, even where we are and what we need to do to get the technology developed. So we remain focused on getting the key technical metrics and developing them. But if suddenly something comes up that we see a huge strategic value that will help us accelerate our timelines, we will look into that.

Sounds good. And then my other kind of follow-up is kind of related to that. Has sort of the Department of Commerce agreement, and I'm thinking more broadly, not just the $100 million to you and other quantitative companies, but also the sort of the fabrication, the investment fabrication, has that sort of, that has been kind of realized and finalized, has that any way changed some of the capital decisions you're going to make going forward?

Well, I mean, there is definitely... An overlap of some of the commerce initiatives we are doing with our original plan, but there's also some separation, too. So we continue to look at our capital requirement, including what we are going to be doing for commerce, and you will see that as we talk about CapEx for 2020, the remaining part of 2026, and certainly 2027 and 2028. So some of these things, like miniaturizing, readout electronics, or nuclearized architecture may involve more capital, CapEx spending that normally we wouldn't have done if we had not signed up for those strategic initiatives. So certainly it has some impact on our CapEx, but in the bigger scheme of things, I mean, they are relatively small compared to what we are talking about to get to that QA milestone in roughly three years.

Great. Great. Thank you. So, thank you for taking my questions, and that's a lot. Thank you.

And our next question will come from Tanu Chauhan with Rosenblatt Securities. Your line's open.

Hey, guys. This is Tanu Chauhan on for John McPeak. Thanks for taking my question. Just a quick one here. For the thousand qubit system, you mentioned that you plan to put more qubits in a single refrigerator rather than networking several, which would be extremely powerful. Sabot, can you talk a bit about wiring limits here currently and then perhaps, you know, touch upon flex cable technology that you've discussed previously to get to the goal of a thousand qubits?

Yeah, certainly. When we say we need, we think we can get 1,000 qubits for sure, but even beyond that, in a single dilution refrigerator, obviously the big benefit is performance benefit as well as cost benefit. And so it's really powerful if you can get 1,000 physical qubits and more in a single dilution refrigerator. But you correctly pointed out that one of the big hurdles to get to that point is cables. Physically, you have a fine...right now, we use coax cables, and I believe most of the industry uses the same. And there's a physical dimension to the coax cable, and each of our qubits needs multiple lines. Along with the qubits, we have the tunable couplers. They also need lines. So you're talking about quite a number of... If you take a few thousand coax cables and try to fit them into a single dilution refrigerator, it's a monstrous challenge. Physically, you will run out of room. So we are talking about flex cable technology, but it's not your generic flex cables that you can buy off the shelf Because we are dealing with superconducting. So we need superconducting flex technology. So we work with some companies. We do some work on our own. We certainly believe when they get to a thousand kubits, maybe even a 300 kubit system, we will be talking about flex cables. And beyond that, we are talking about fiber optics as well. In the past, we have talked about how potentially fiber optics can be leveraged in quantum computing. We have done some early work on our own along with some partner companies and have published a few papers. So we certainly think right now from coax we will go to flex cables in the 300 to 1,000 kW system range. And, at some point, when we start talking about thousands of physical qubits in a single addition refrigerator, we will be talking about fiber optics.

I see. Got it. And it's really great to see the new mid-2028 target for a 300-plus qubit system. You know, like just along the same lines, what has to go right to hit that date? You know, is it more qubits per chiplet? Is it the flex cable technology, faster readout, more cryo capacity? Maybe just a little color on that.

Sure. So the biggest challenge is Frankly, for the 2028 milestone, the mid-2028 milestone of 300 qubits at 99.7% two-qubit gate fidelity, and 50 nanosecond gate speed, frankly, is the 99.7% two-qubit gate fidelity, along with what we call readout fidelity and parallel fidelity. That is the bigger challenge. With the chiplet approach we have, certainly there are challenges to get from 108 qubit to 300 plus qubit. But with a chiplet approach, those challenges are a lot more manageable, we believe. But fidelity, certainly, we need to continue to talk about improvement in coherence time. We need to continue to talk about other contributing factors in fidelity. So we still continue to believe that our number one challenge is getting to the 99.7% range at the 300 plus qubit. Then getting the size of the chiplet up and the number of chiplets. And that would be the next big challenge. Speed, we feel pretty good about where we are right now with the 60 nanosecond gate speed, and getting down to below 50 is not that big of a challenge. But certainly we'll be talking about error mitigation and error correction, and we are talking real-time error correction. Right now, if you think about superconducting modality, we are roughly 10,000 times faster than trapped ion. and 100 times faster than pure atom. So when we talk about real-time error correction, error correction has to happen at that speed, too. Otherwise, that would be the bottleneck. So it's not a trivial thing to get real-time error correction going, particularly with the speeds of superconducting. So that will be the next big hurdle, certainly for the 1,000-kibit system, but even for the 300-kibit system.

Got it. Thanks so much, Subodh. That's very helpful. And that's all from you guys. Congrats on another quarter in the books. Thank you.

And the next question will come from Jesse Sobelson with U.S. Bancorp. Your line's open.

Hey there, everyone. Thank you for taking my question here. Maybe beyond hardware, I know that you have previously pursued a pretty lean strategy when it comes to software, but I think that as you scale up and as you mentioned with reaching closer to 100 physical qubits with some of these systems, error correction, error mitigation are becoming more important when it comes to delivering, improving KPIs with your machinery. Can you just discuss your viewpoint there and if anything has changed or how you're working with your partners today to improve the systems that you're currently delivering on?

Thanks for the question, and it's an excellent question. We certainly fully understand the critical role software is going to play as we continue to get better and better hardware. Today, hardware is limiting for almost all the quantum computing technology players, and that's why a lot of the discussion... We are doing work on our own. We have closely partnered with River Lane in Cambridge, UK, and we have published a few papers talking about how we plan to get to real-time error correction course. There's all kinds of details getting into surface codes, which is QLDPC type codes, and we talk about a lot of that in the papers that we have published and how we plan to get to the right kind of real time. Beyond error correction, we are talking algorithm development and application development, and that's really where we believe we play a very critical role in the quantum ecosystem. We have made our 108 qubit system available on public clouds like AWS Bracket and Microsoft Azure. Thousands of people are using it every day. Many of them are trying to fundamentally understand what quantum computing can do and cannot do, and they are looking at applications and algorithm development. We believe that's a critical role we need to play to allow that ecosystem to develop. So when we get closer to the quantum advantage, we don't want to come to that point and then say we need applications. It's important that we have more and more application developers and algorithm developers. Come into quantum ecosystem, because fundamentally, it is a different way of programming a computer than your classical computer, so definitely expect us to be talking more about error correction, but also application development as we get closer to quantum advantage. Hopefully, that answers your question.

Absolutely. Thank you.

Thank you.

I would now like to turn the call back over to Sabode for closing remarks.

Thank you, Operator, and thank you to everyone who joined us today. In the coming months, we will participate in several investor and industry conferences, and we look forward to continuing to engage with stakeholders and keeping you updated on our progress. Thank you for your continued interest in rigating.

This concludes today's conference call. Thank you for participating, and you may now disconnect.